Incorporated herein is a computer program listing microfiche appendix of source code which creates a sliced synchronous simulation engine from a functional description. Also included in the microfiche appendix consisting of 1 microfiche and 2 pages is an exemplary graphical behavioral description including two partitions and the scheduled source code created according to the program listing. Copyright, 1995, C.A.E. Plus, Inc. A portion of the disclosure to this patent document contains material which is subject to copyright protection. The copyright owner expressly reserves all copyright rights whatsoever to materials contained in this disclosure, including materials within the "microfiche appendix" which are incorporated herein by reference.
1. Field of the Invention
This invention relates to the field of integrated circuit simulation and validation and, more particularly, to the validation of complex integrated circuits via a high speed simulation engine.
2. Description of the Relevant Art
Integrated circuits are employed in a wide variety of applications, from computer systems to automobiles. An integrated circuit is a electronic device in which a plurality of transistors are configured upon a single, monolithic substrate. The plurality of transistors are configured to perform a desired operation or operations.
Integrated circuits are often synchronous circuits. A synchronous circuit is a circuit embodying memory elements and combinatorial logic coupled between the memory elements. The memory elements store a plurality of values referred to as the current "state" of the integrated circuit. Given a particular state, the integrated circuit calculates a next state according to the combinatorial logic. The next state is presented to the inputs of the memory elements, which store the next state as the new current state according to a particular clock. As used herein, a clock is a signal having a repetitive waveform. The time interval in which a single instance of the repetitive waveform occurs is referred to as the "period" of the waveform.
The period of the waveform determines the time interval allotted for the combinatorial logic of the integrated circuit to perform its transformation of current state to next state. At a particular point within the period, the memory elements discard the values being stored and store the values presented at their inputs (referred to as capturing a value). In one embodiment, the clock is a square wave having a rising edge (a transition from a low value to a high value) and a falling edge (a transition from a high value to a low value). Memory elements may be configured to capture values at the rising edge of the clock or, conversely, at the falling edge of the clock. In one embodiment, memory elements comprise registers configured to store a value and arrays of memory locations configured to store a plurality of values.
When integrated circuits were first developed, the semiconductor fabrication technologies employed to manufacture the integrated circuits afforded only relatively simple integrated circuits. These integrated circuits could be designed on paper and could be verified, or validated, as functionally correct via a small number of test vectors manually created by the designer of the integrated circuit. As used herein, a "test vector" is a set of stimulus values for an integrated circuit accompanied by a set of responses expected from the integrated circuit. For example, a stimulus may be a set of values to be applied to input pins of the integrated circuit and the expected responses may be a set of values expected to appear upon output pins of the integrated circuit.
As semiconductor fabrication technologies improve, more transistors may be placed on a given semiconductor substrate. In recent years, integrated circuits have become more complex. Due to the increased complexity, the design and subsequent validation techniques have changed. With the advent of these more complex integrated circuits, a set of event-driven simulators were developed to aid the design and validation of integrated circuits. A simulator automatically applies a set of test vectors to a simulation model representing an integrated circuit. The simulation results are then checked against the expected results within the test vector. The test vectors may be created manually, or may be generated in an automated fashion. The simulator may also be referred to as a simulation engine.
One popular representation of the simulation model is a register-transfer level (RTL) description. An RTL description represents an integrated circuit as a set of elements such as memory elements and combinatorial circuits, as well as the interconnection between the elements. Each element within the description comprises a record defining the element, its functionality, and the time interval required for the element to operate. The time interval is typically measured from an edge of the clock which is used by the memory elements to capture state.
The RTL description is a "functional description". As used herein, a functional description of an integrated circuit is a description which may be synthesized into a description of transistors to be configured onto a semiconductor substrate to form the integrated circuit. It is noted that functional descriptions may include multiple partitions. The multiple partitions comprise a high level division of integrated circuit functionality into blocks of functionality. Each partition describes a particular block of functionality. Partitions may include dissimilar clocks having dissimilar periods with respect to the clock s of other partitions. However, the dissimilar periods are integer multiples of a common base period. Additionally the clocks of different partitions may have different phases. Clocks having a similar period have different phases if their rising and falling edges occur at dissimilar times with respect to each other. Because clocks may have different periods and different phases, asynchronous communication may occur between the synchronous partitions of an integrated circuit.
Event-driven simulators process a plurality of events generated by the simulation model, dynamically scheduling new events based upon the processing of the current events. An "event" is a function to be performed at a particular time. Exemplary events within integrated circuits include the output of an adder circuit becoming valid or the capturing of a value by a memory element. The collection of events created by an integrated circuit design, when taken together, comprise the desired operation of the integrated circuit.
When an event is "scheduled", values associated with the event are stored in a data structure and the event is logged for later action at a particular time by the event-driven simulator. When the events scheduled for the current time are completed, the event-driven simulator increments its time base to the next time at which events are scheduled. The events at that time are processed, possibly creating more new events. Upon completion of event processing at the new time, the event-driven simulator increments to yet another time. The time increments are dynamically determined by the events scheduled, and may vary from increment to increment.
Event-driven simulation is useful for exploring possible integrated circuit designs for a suitable design. The design may be under constant change, and so the events generated may be unpredictable from simulation to simulation. Unfortunately, event-driven simulation is not suitable for the rigorous validation required for complex integrated circuits. Often, design validation time is the dominant factor in the amount of time required to complete a design. Numerous test vectors must be created and simulated, and so the simulator must be able to execute a large number of test vectors in a relatively short period of time. Event-driven simulators execute relatively slowly, due to the overhead of dynamic scheduling of events. When an event is scheduled, information pertinent to the event is saved in a data structure. Exemplary information includes the function to be performed when the event is processed as well as any input values utilized by the function. These data structures are stored in memory until the event is processed. The storing of events and retrieving of events for execution accounts for a large portion of the processing time associated with event-driven simulators. A faster method for simulating complex integrated circuits is desired.